The layer dynamic was described with a parametric differential equation, and it was coupled to the concentrated and distributed thermal models of the PCB and the capacitor. It was defined as an inverse heat conduction problem (IHCP) and proposed a solution based on finite difference modelling (FDM) with an alternating direction implicit (ADI) scheme. Our aim was to develop a simple and fast computable method that, instead of relying on static descriptions, can reproduce the transient dynamics of the process. Classic VPS processes provide rapid heating with high heat transfer coefficient rates due to condensation that forms a continuous liquid film on the surfaces. In this paper transient condensation and heat transfer been investigated on a printed circuit board (PCB) and a surface mounted (SMD) capacitor during a vapour phase reflow soldering (VPS) process. This review paper is expected to provide necessary information and direction to future researchers and industrial engineers when designing a brand-new surface-mounted component. Moreover, the Cu pillar technology challenges are also highlighted in this review. The considerations of air flow and thermal effects enhanced the study of fluid flow on the PCB assembly. The temperature distribution and the thermal stress condition of the PCB assembly within the reflow oven are predicted to understand better the fluid–structure interaction in the reflow oven. The thermal and air flow aspects of the reflow process are reviewed. Thus, this review focuses on the simulation modeling of the PCB assembly within a reflow oven using different numerical approaches. The simulation tools have recently facilitated the Cu pillar bump research during the PCB assembly process. The conversion of the flip-chip interconnection bump from the solder ball to the Cu pillar bump with the solder cap and the joint performance within the reflow oven are presented in this review. This technology with area array feature is a surface mount technology process used to form interconnection bonding between ball grid array chip and printed circuit board (PCB) by the reflow soldering process. This paper reviewed the state-of-art copper pillar technology in flip-chip packaging, driven by the semiconductor industry’s demands for thinner and faster data transmission.
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |